Modeling ADC Energy and Area Trade-offs for Compute-In-Memory Accelerators
Keywords:
Compute-in-Memory (CIM), Analog-to-Digital Converter (ADC), Energy Efficiency, Area Efficiency, Accelerator Design, Memory Computing, Hardware Architecture, Low-Power DesignAbstract
The need for energy-efficient and high-performance computational systems has led to the exploration of specialized architectures like Compute-in-Memory (CIM). CIM accelerators are designed to process data directly within memory arrays, significantly reducing data movement and improving energy efficiency. A critical component of CIM systems is the Analog-to-Digital Converter (ADC), which converts analog signals from memory into digital data for processing. This paper investigates the energy and area trade-offs of ADCs used in CIM accelerators. By exploring various ADC architectures and their integration with memory-based computing, we highlight the challenges and strategies for optimizing energy consumption and area efficiency in these systems.
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